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i2c: fine tune register values to meet the 100 kHz frequency requirement #78

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Merged
ddeshat merged 1 commit into from
Apr 17, 2026
Merged

i2c: fine tune register values to meet the 100 kHz frequency requirement #78

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2 changes: 1 addition & 1 deletion bsp_sedi/drivers/i2c/sedi_i2c_dw_apb_200a.c
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Original file line number Diff line number Diff line change
Expand Up @@ -110,7 +110,7 @@ static uint32_t regval_speed[I2C_SPEED_MAX] = {
* For example, standard mode is 100KHz, 10000ns per period, 5000ns for
* SCL low & high level.
*/
#define I2C_SS_SCL_HIGH 4500
#define I2C_SS_SCL_HIGH 4640
#define I2C_SS_SCL_LOW 5100
#define I2C_FS_SCL_HIGH 690
#define I2C_FS_SCL_LOW 1650
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