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[verilator] Add shutdown request mechanism to prevent early UART closes in CI#240

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kat/fix-verilator-early-uart-close
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[verilator] Add shutdown request mechanism to prevent early UART closes in CI#240
pqcfox wants to merge 1 commit intomasterfrom
kat/fix-verilator-early-uart-close

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@pqcfox pqcfox commented Apr 9, 2026

This PR introduces a new shutdown request mechanism for Verilator tests to prevent spurious test failures from early UART closures.

Note that this PR only implements this change for the EarlGrey top, as this is the only top Verilator tests support at the moment. Analogous changes can be made later to chip_sim_tb.sv for other tops as they become supported.

Prior to this PR, Verilator tests would sometimes fail due to the chip simulation testbench calling $finish before opentitantool console could drain the UART buffer, triggering a test failure even after success was visibly reported over UART. To fix this, a 'virtual' REQUEST_EXIT pin has been added to the GPIO DPI to trigger a graceful shutdown of the verilated testbench, with the host then waiting a fixed timeout for the child subprocess to exit before killing it as before.

This PR introduces a dependency on wait-timeout, which is a Rust crate allowing one process to wait on a child process to terminate with a timeout. License for wait-timeout is standard MIT/Apache 2.0.

@pqcfox pqcfox force-pushed the kat/fix-verilator-early-uart-close branch 6 times, most recently from 2bd05fd to 7cc8d71 Compare April 13, 2026 17:19
@pqcfox pqcfox changed the title [verilator] Add small delay to VerilatorSimCtrl::Run to prevent early UART closes in testing [verilator] Add shutdown request mechanism to prevent early UART closes in CI Apr 13, 2026
@pqcfox pqcfox changed the title [verilator] Add shutdown request mechanism to prevent early UART closes in CI [verilator] Add shutdown request mechanism for EG to prevent early UART closes in CI Apr 13, 2026
@pqcfox pqcfox force-pushed the kat/fix-verilator-early-uart-close branch 3 times, most recently from dd56637 to 0be0b3c Compare April 13, 2026 17:26
@pqcfox pqcfox changed the title [verilator] Add shutdown request mechanism for EG to prevent early UART closes in CI [verilator] Add shutdown request mechanism to prevent early UART closes in CI Apr 13, 2026
tiny-keccak = {version = "2.0.2", features = ["cshake"]}
tokio = { version = "1", features = ["full"] }
typetag = "0.2"
wait-timeout = "0.2.1"
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Is this a version requirement on a dependency? I don't see what "wait-timeout" indicates, was it a pre-existing module/package/thing? It seems is not created in this PR.

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@pqcfox pqcfox Apr 14, 2026

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It is, it's the most recent version of an external package from crates.io which I had to introduce to properly handle waiting on the Verilator subprocess to close with a timeout (so that I could send kill and print a warning should the subprocess not respond to the REQUEST_EXIT pin being asserted in a reasonable amount of time).

@pqcfox pqcfox force-pushed the kat/fix-verilator-early-uart-close branch 6 times, most recently from 8f42c46 to d580419 Compare April 20, 2026 14:14
Prior to this commit, Verilator tests would sometimes fail due to
the chip simulation testbench calling $finish before `opentitantool
console` could drain the UART buffer, triggering a test failure even
after success was visibly reported over UART. To fix this, a 'virtual'
REQUEST_EXIT pin has been added to the GPIO DPI to trigger a graceful
shutdown of the verilated testbench, with the host then waiting a fixed
timeout for the child subprocess to exit before killing it as before.

Signed-off-by: Kat Fox <kat@zerorisc.com>
@pqcfox pqcfox force-pushed the kat/fix-verilator-early-uart-close branch from d580419 to 0686249 Compare April 20, 2026 14:21
@pqcfox pqcfox marked this pull request as ready for review April 20, 2026 14:21
@pqcfox pqcfox requested review from qmn and rtorok-zr April 20, 2026 14:21
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