Support region padding for MPU programming#146
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jonathanpallant merged 4 commits intorust-embedded:mainfrom Apr 14, 2026
Merged
Support region padding for MPU programming#146jonathanpallant merged 4 commits intorust-embedded:mainfrom
jonathanpallant merged 4 commits intorust-embedded:mainfrom
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Everything I didn't mention looks okay assuming all the magic numbers in the reference files are correct.
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LGTM |
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I want to rename |
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Also https://github.com/ferrocene/aarch64-cpu/tree/refs/heads/add-aarch64-pmsa-rt calls them |
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Done |
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* Add an API to get the various linker output sections (aarch32_rt::region) * Adjust link.x to allow for adjustable alignment of regions * Adjust link.x to allow for adjustable padding between stacks * Add an example that programs the MPU
As suggested in code review, now we're less likely to forget to update the Iterator when adding new regions/stacks.
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robamu
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Make it easier to set up the MPU
The MPS3-AN536 padding is set at 64K, so that the normal build and the +d32 build end up with the same memory map (otherwise their output for the mpu_region example would be different).