FROMLIST: arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Disable WCN6750 and WPSS#357
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…able WCN6750 and WPSS On the RB3 Gen2 industrial mezzanine platform, since PCIe0 now routes to TC9563 instead of WCN6750, disable the WCN6750 and WPSS device tree nodes to reflect the actual hardware configuration and avoid probing issues. Signed-off-by: Hangtian Zhu <hangtian@oss.qualcomm.com> Signed-off-by: Sushrut Shree Trivedi <sushrut.trivedi@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260317-industrial-mezzanine-pcie-v5-1-1358978517fe@oss.qualcomm.com/
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@zhuhangtian please check why CR premerge check is failing |
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qualcomm-linux/kernel-topics#795 is the mainline PR, can you please check and approve? |
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now, both 0.0 and 2.0 set to dev complete |
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On the RB3 Gen2 industrial mezzanine platform, since PCIe0 now routes to
TC9563 instead of WCN6750, disable the WCN6750 and WPSS device tree nodes
to reflect the actual hardware configuration and avoid probing issues.
Signed-off-by: Hangtian Zhu hangtian@oss.qualcomm.com
Signed-off-by: Sushrut Shree Trivedi sushrut.trivedi@oss.qualcomm.com
Reviewed-by: Dmitry Baryshkov dmitry.baryshkov@oss.qualcomm.com
Reviewed-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com
Link: https://lore.kernel.org/all/20260317-industrial-mezzanine-pcie-v5-1-1358978517fe@oss.qualcomm.com/
CRs-Fixed: 4459835