ArcheV

RISC-V RV-32i RTL Benchmark for evaluating Large Language Models developed by merledu

Name		Name	Last commit message	Last commit date
Latest commit History 17 Commits
.github/workflows		.github/workflows
project		project
rtl		rtl
src		src
.gitignore		.gitignore
FetchUnit10.sv		FetchUnit10.sv
README.md		README.md
build.sbt		build.sbt
build.sc		build.sc
checklist.md		checklist.md
emit_verilog.py		emit_verilog.py

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