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Fix build issues, enhance README, and improve trace handling#79

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hyesoon merged 5 commits intomasterfrom
nvbit
Mar 22, 2026
Merged

Fix build issues, enhance README, and improve trace handling#79
hyesoon merged 5 commits intomasterfrom
nvbit

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Fixed some build bugs and added some setup details in the README.

Euijun Chung and others added 5 commits March 22, 2026 13:52
- Remove unused Time::localtime Perl import that breaks builds without the module
- Remove --static linker flag to fix builds on systems without static zlib
- Update CUDA_trace_generator submodule URL to gthparch/Macsim_tracer (HTTPS)
- Add zlib prerequisite and uv/SCons build instructions to README
- Add *.diff, *.pyc to .gitignore

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- Added macsim_traces/, macsim, params.in, and trace_file_list to .gitignore.
- Improved README with a more detailed introduction, installation instructions, and a new table of contents.
- Clarified build instructions and added a quick start guide for downloading and running simulations with sample traces.
…mented code

- Added clamping for register counts in nvbit_decoder_c to prevent out-of-bounds access from malformed traces.
- Cleaned up commented-out code in trace_read_nvbit.cc for better readability.
- Updated .gitignore to include test_run/ directory.
- Fix frontend.cc: remove static bool map_core that was shared across
  all core instances, causing only the first core's m_core to be set
- Fix core.cc: initialize m_hw_pref to NULL when prefetcher is disabled,
  preventing segfault on delete in destructor. Add missing deletes for
  m_const_cache, m_texture_cache, m_shared_memory.
- Fix trace_read_nvbit.cc: handle tracer sentinel value 255 for
  m_num_read_regs/m_num_dest_regs (used for instructions with no
  registers like RET), which caused buffer overflow in register loops
- Add child trace counting infrastructure (count_child_traces) and
  parent/child uop linking scaffolding for coalesced memory traces
  (currently disabled pending trace format validation)
- Disable barrier BAR_FETCH support pending further investigation

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
…README

- Re-enable BAR_FETCH barrier support in NVBit trace reader
- Enable child trace coalescing (count_child_traces) for parent/child
  uop linking of uncoalesced memory accesses
- Add batch benchmark test script to README Quick Start section

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
@ejchung0406 ejchung0406 requested a review from hyesoon March 22, 2026 19:47
@ejchung0406 ejchung0406 self-assigned this Mar 22, 2026
@hyesoon hyesoon merged commit 63a7d8b into master Mar 22, 2026
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2 participants