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This commit introduces the CPU verification mechanism to validate Triton kernels without NPU hardware. Key changes include: - Add cpu_backend.py: CPU-based execution backend using LLVM/MLIR infrastructure - Add DebugCPUVerifyPass: Validates that external dialect ops are lowered before CPU execution - Add test/ascend/cpu_verify/: Minimal test cases for vec_add, matmul, and flash attention Usage: export DLC_CPU_VERIFY=1 export LLVM_BINARY_DIR=/path/to/llvm/bin python test/ascend/cpu_verify/test_vec_add.py The CPU backend converts Triton IR to LLVM IR via MLIR passes and executes natively on CPU for rapid iteration and debugging.
hellozmz
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Apr 2, 2026
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在github上配置下测试的action：.github/workflows/main.yml。每次提交代码时候触发下测试用例。
| os.environ.setdefault("DLC_CPU_VERIFY", "1") | ||
| os.environ.setdefault( | ||
| "LLVM_BINARY_DIR", | ||
| "/mnt/data01/kezengxiang/work/third_party/llvm-project/build_064f02dac0c81c19350a74415b3245f42fed09dc/bin", |
| @@ -0,0 +1 @@ | |||
| https://github.com/llvm/llvm-project/commit/3be3883e6d67bf908fd12b51219075293ebb3dff | |||
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现在项目里使用的版本是 064f02dac0c81c19350a74415b3245f42fed09dc
为什么没有复用
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This commit introduces the CPU verification mechanism to validate Triton kernels without NPU hardware. Key changes include:
Usage:
export DLC_CPU_VERIFY=1
export LLVM_BINARY_DIR=/path/to/llvm/bin
python test/ascend/cpu_verify/test_vec_add.py
The CPU backend converts Triton IR to LLVM IR via MLIR passes and executes natively on CPU for rapid iteration and debugging.