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AArch64 asm clobbers: recognize more register names#576

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xavierleroy wants to merge 1 commit intomasterfrom
aarch64-register-aliases
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AArch64 asm clobbers: recognize more register names#576
xavierleroy wants to merge 1 commit intomasterfrom
aarch64-register-aliases

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As reported in #569, in the "clobbers" clause of asm statements, CompCert recognizes fewer AArch64 register names than GCC or Clang. The suggestion was to accept

  • Wn as alias for Xn (integer register)
  • Vn Qn Sn Hn Bn as aliases for Dn (floating-point/vector register)

This PR implements this suggestion in the most stupid possible way, with an extra table of aliases. #569 suggested a more concise approach, but it extracts to awful OCaml code, impossible to review manually.

Fixes: #569

Wn as alias for Xn  (integer register)
Vn Qn Sn Hn Bn as aliases for Dn  (floating-point/vector register)

Fixes: #569
@xavierleroy xavierleroy force-pushed the aarch64-register-aliases branch from 4ec1df3 to 7d9e5f4 Compare March 16, 2026 14:21
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aarch64 vload/vstore offsets, register aliases

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