diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 4ee379d9c69..421feeb9bd2 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -248,11 +248,44 @@ jobs: verilator --version - name: ACC ISS test run: make -C hw/ip/acc/dv/accsim test - - name: OBTN smoke test + - name: ACC smoke test run: ./hw/ip/acc/dv/smoke/run_smoke.sh - name: Assemble & link code snippets run: make -C hw/ip/acc/util asm-check + acc_standalone_pqc_tests: + name: Run ACC PQC smoke Test + needs: quick_lint + runs-on: + group: zerorisc-none + if: ${{ github.event_name != 'merge_group' }} + timeout-minutes: 10 + steps: + - uses: actions/checkout@v4 + with: + fetch-depth: 0 # Bitstream cache requires all commits. + - name: Prepare environment + uses: ./.github/actions/prepare-env + - name: Install toolchain + run: | + TOOLCHAIN_PATH=/tools/riscv + sudo util/get-toolchain.py \ + --install-dir="$TOOLCHAIN_PATH" \ + --release-version="$TOOLCHAIN_VERSION" \ + --update + echo "$TOOLCHAIN_PATH/bin" >> $GITHUB_PATH + - name: Display environment + run: | + python3 --version + fusesoc --version + verilator --version + - name: ACC ISS test + run: make -C hw/ip/acc/dv/accsim test + - name: ACC PQC smoke test + run: ./hw/ip/acc/dv/smoke_pqc/run_smoke.sh + - name: Assemble & link code snippets + run: make -C hw/ip/acc/util asm-check + acc_crypto_tests: name: Run ACC crypto tests needs: quick_lint diff --git a/hw/ip/acc/doc/developing_acc.md b/hw/ip/acc/doc/developing_acc.md index c3656aec90f..a49efcfe08e 100644 --- a/hw/ip/acc/doc/developing_acc.md +++ b/hw/ip/acc/doc/developing_acc.md @@ -56,11 +56,12 @@ $ hw/ip/acc/dv/accsim/standalone.py -t path/to/prog.elf ``` ### Run the standalone RTL simulation -A standalone environment to run ACC alone in Verilator is included. Build it -with `fusesoc` as follows: +A standalone environment to run ACC alone in Verilator is included. +The Verilator environment uses an optional fusesoc flag to configure the ACC hardware and model. +Build it with `fusesoc` as follows and note that `--flag pqc` is optional: ```sh -fusesoc --cores-root=. run --target=sim --setup --build lowrisc:ip:acc_top_sim +fusesoc --cores-root=. run --target=sim --flag pqc --setup --build lowrisc:ip:acc_top_sim ``` It includes functionality to set the initial Dmem and Imem contents from a .elf diff --git a/hw/ip/acc/dv/README.md b/hw/ip/acc/dv/README.md index 784a9555929..106c80ab0e1 100644 --- a/hw/ip/acc/dv/README.md +++ b/hw/ip/acc/dv/README.md @@ -83,6 +83,8 @@ When testing ACC, we are careful to distinguish between Testing lots of different instruction streams doesn't really use the UVM machinery, so we have a "pre-DV" phase of testing that generates constrained-random instruction streams (as ELF binaries) and runs a simple block-level simulation on each to check that the RTL matches the model. The idea is that this is much quicker for designers to use to smoke-test proposed changes, and can be run with Verilator, so it doesn't require an EDA tool licence. +The Verilator environment uses a fusesoc flag to configure the ISS model and ACC dependencies. +To configure the simulation environment for simulation of the vector ISA extension use `--flag pqc` during the build invocation. This pre-DV phase cannot drive sign-off, but it does use much of the same tooling. Once we are running full DV tests, we re-use this work, by using the same collection of randomised instruction streams and randomly picking from them for most of the sequences. diff --git a/hw/ip/acc/dv/accsim/stepped.py b/hw/ip/acc/dv/accsim/stepped.py index f78893fdb31..7c984bef066 100755 --- a/hw/ip/acc/dv/accsim/stepped.py +++ b/hw/ip/acc/dv/accsim/stepped.py @@ -73,9 +73,9 @@ set_software_errs_fatal Set software_errs_fatal bit. ''' +import argparse import binascii import sys -import os from typing import List, Optional from sim.decode import decode_file @@ -294,7 +294,7 @@ def on_print_call_stack(sim: ACCSim, args: List[str]) -> Optional[ACCSim]: def on_reset(sim: ACCSim, args: List[str]) -> Optional[ACCSim]: check_arg_count('reset', 0, args) - return ACCSim(get_pqc_mode()) + return ACCSim(sim.EN_PQC) def on_edn_rnd_step(sim: ACCSim, args: List[str]) -> Optional[ACCSim]: @@ -454,12 +454,11 @@ def on_input(sim: ACCSim, line: str) -> Optional[ACCSim]: return ret -def get_pqc_mode() -> bool: - return os.environ.get("PQC_EN", '0') == '1' - - def main() -> int: - sim = ACCSim(get_pqc_mode()) + parser = argparse.ArgumentParser() + parser.add_argument('--pqc', action='store_true', help='Enable pqc mode in ISS model.') + args = parser.parse_args() + sim = ACCSim(args.pqc) try: for line in sys.stdin: ret = on_input(sim, line) diff --git a/hw/ip/acc/dv/model/iss_wrapper.cc b/hw/ip/acc/dv/model/iss_wrapper.cc index 421adc45d15..4c06028767c 100644 --- a/hw/ip/acc/dv/model/iss_wrapper.cc +++ b/hw/ip/acc/dv/model/iss_wrapper.cc @@ -314,9 +314,15 @@ ISSWrapper::ISSWrapper() : tmpdir(new TmpDir()) { << "\n"; abort(); } - // Finally, exec the ISS + +// Finally, exec the ISS +#ifdef PQC_EN + execl("/usr/bin/env", "/usr/bin/env", "python3", "-u", model_path.c_str(), + "--pqc", NULL); +#else execl("/usr/bin/env", "/usr/bin/env", "python3", "-u", model_path.c_str(), NULL); +#endif } // We are the parent process and pid is the PID of the child. Close the pipe diff --git a/hw/ip/acc/dv/rig/rig/gens/clear_wsr.py b/hw/ip/acc/dv/rig/rig/gens/clear_wsr.py index bb689321cbf..537002bc503 100644 --- a/hw/ip/acc/dv/rig/rig/gens/clear_wsr.py +++ b/hw/ip/acc/dv/rig/rig/gens/clear_wsr.py @@ -92,5 +92,3 @@ def gen(self, model.pc += 4 return (snippet, model) - - return None diff --git a/hw/ip/acc/dv/smoke_pqc/run_smoke.sh b/hw/ip/acc/dv/smoke_pqc/run_smoke.sh index 0980dac4750..41a914253d4 100755 --- a/hw/ip/acc/dv/smoke_pqc/run_smoke.sh +++ b/hw/ip/acc/dv/smoke_pqc/run_smoke.sh @@ -34,7 +34,7 @@ $ACC_UTIL/acc_ld.py -o $SMOKE_BIN_DIR/smoke.elf $SMOKE_BIN_DIR/smoke_test.o || \ fail "Failed to link smoke_test.o" (cd $REPO_TOP; - fusesoc --cores-root=. run --target=sim --setup --build \ + fusesoc --cores-root=. run --target=sim --flag pqc --setup --build \ --mapping=lowrisc:prim_generic:all:0.1 lowrisc:ip:acc_top_sim \ --make_options="-j$(nproc)" || fail "HW Sim build failed") diff --git a/hw/ip/acc/dv/smoke_pqc/smoke_expected.txt b/hw/ip/acc/dv/smoke_pqc/smoke_expected.txt index dc200935a1e..8d12ab014d2 100644 --- a/hw/ip/acc/dv/smoke_pqc/smoke_expected.txt +++ b/hw/ip/acc/dv/smoke_pqc/smoke_expected.txt @@ -9,9 +9,9 @@ Reg | Value ---------------- x2 | 0xd0beb513 x3 | 0xa0be911a -x4 | 0x717d462d -x5 | 0xcfffdc07 -x6 | 0xf0beb51b +x4 | 0x00000000 +x5 | 0x00000010 +x6 | 0x00000920 x7 | 0x80be9112 x8 | 0x70002409 x9 | 0xd0beb533 @@ -28,7 +28,7 @@ x19 | 0xd0beb533 x20 | 0x00000123 x21 | 0x00000123 x22 | 0xcafef010 -x23 | 0x89c9b54f +x23 | 0x53769ada x24 | 0x00000052 x25 | 0x00000020 x26 | 0x00000016 @@ -41,30 +41,30 @@ x31 | 0x00000804 Final Bignum Register Values: Reg | Value ------------------------------------------------------------------------------- -w0 | 0x37adadae_f9dbff5e_73880075_5466a52c_67a8c221_6978ad1b_25769434_0f09b7c8 +w0 | 0xc17c6279_48268673_81332876_e87a1613_7a024204_82e2e662_6baa9455_d82c07cd w1 | 0x00000000_00000000_00000000_00000000_baadf00d_baadf00d_baadf00d_baadf00d -w2 | 0x440659a8_32f54897_440659a8_32f54898_dd6208a5_cc50f794_dd6208a5_cc50f791 -w3 | 0x23a776b0_bbc28370_34745ffa_22168ae8_7245a2d0_0357f208_431165e5_ed103473 -w4 | 0xce52215b_888f503c_df1f0aa4_eee357b5_1cf04d7a_d024bed4_edbc1090_b9dd0141 -w5 | 0xfafeeeae_bbb9f9df_abebbfef_99fdf9df_efbafaaf_f9bfd9ff_baeebbbb_dbff9bdb -w6 | 0x28a88802_00088990_8888a00a_88189108_828aa820_09981808_8822aa2a_11109898 -w7 | 0xd25666ac_bbb1704f_23631fe5_11e568d7_6d30528f_f027c1f7_32cc1191_caef0343 -w8 | 0x870333f9_ddd71629_76364ab0_77830eb1_386507da_9641a791_679944c4_ac896525 -w9 | 0xd7c12b4d_f2c374c3_35d9da9b_b4d6d555_555554cc_cccccd55_555554cc_cccccd55 -w10 | 0x05011151_1112d2ed_54144010_32ced2ed_1045054f_d30cf2cd_45114443_f0cd30f0 -w11 | 0xd75777fd_ccc4433c_77775ff5_44b43bc4_7d7557df_c334b4c4_77dd55d5_bbbc3433 -w12 | 0x2caccd53_332aa9a2_ccccb54a_ab1aa22a_d2caad35_299b1b2a_cd32ab2b_22229a9a -w13 | 0xa1a55408_5564a69a_1252555a_43c8b58a_4a25a045_a689a3aa_20896565_97ba66a7 -w14 | 0x5ec45f47_d09a8aec_ac10254c_2c59e406_8dba5ca7_630e74e6_bcee9991_7956327a -w15 | 0xdc58894e_ddd71629_cb8ba005_77830eb1_8dba5d2f_9641a791_bcee9a19_ac896524 -w16 | 0xce52215b_888f503c_df1f0aa4_eee357b5_1cf04d7a_d024bed4_edbc1090_b9dd0141 -w17 | 0x55555555_33333333_55555555_33333333_55555555_33333333_55555555_33333331 -w18 | 0x23a7769f_bbc28381_34745fe9_22168a4e_c79af825_69be586e_9866bb3b_53769ada -w19 | 0x28a88800_00088982_8888a009_8818910a_828aa801_09981800_00000000_00000000 -w20 | 0x78fccc06_2228e9d6_89c9b54f_887cf14e_c79af825_69be57c3_edbc10a1_b9dd0130 -w21 | 0x78fccc06_2228e9d6_89c9b54f_887cf1ee_efbafabd_f9bfd9ee_baeebbbb_dbff9bfa -w22 | 0x78fccc06_2228e9d6_89c9b54f_887cf1ee_efbafabd_f9bfd9ee_baeebbbb_dbff9db7 -w23 | 0x78fccc06_2228e9d6_89c9b54f_887cf1ee_efbafabd_f9bfd9ee_baeebbbb_dbff99f3 +w2 | 0xb8af10ba_900d49c3_fe4b0603_ebd96d05_6b8b1e8a_1fd9abff_90927319_e11847b2 +w3 | 0x540190f6_f2222292_38184d50_ef25c6ac_34f908f6_7a494e88_2ebee549_042de7ca +w4 | 0xc17c6279_f6b19ac6_81332876_527dbe06_7a024204_ed224e04_6baa9455_ae60e9ba +w5 | 0xf2222292_48268673_ef25c6ac_e87a1613_7a494e88_82e2e662_042de7ca_d82c07cd +w6 | 0x6d7ad183_d72cdb49_491adb26_7c7540f3_4509390e_b5f0da2c_3cebaf0c_85af0d51 +w7 | 0x540190f6_48268673_38184d50_e87a1613_34f908f6_82e2e662_2ebee549_d82c07cd +w8 | 0x984d086c_166030fe_602a036f_48195e22_794a7bcc_2897612a_42c867a9_430add5c +w9 | 0xa2588050_61fc10be_b98e87c8_bc4424fe_3c96abd0_c2544554_57bba11f_bab8adc2 +w10 | 0x35b392bb_20642325_ad08b528_59565085_616b21b9_349570ae_a0e5f27a_b0cc409b +w11 | 0x90032ae3_10ac534f_602a036f_fbb2273a_5acfc9c0_8ec2961c_5022d55b_322ea853 +w12 | 0xc17c6279_1715bdeb_81332876_abd40e8b_7a024204_21b7beb2_6baa9455_5f2d2a55 +w13 | 0x02ce75e1_48268673_ead7ede6_e87a1613_090be4a4_82e2e662_365c901d_d82c07cd +w14 | 0xc17c6279_745a5635_81332876_76e76334_7a024204_d312a2d7_6baa9455_5c9c1cb8 +w15 | 0x38064cd0_48268673_d05a9e11_e87a1613_c4c1dbad_82e2e662_ada09fed_d82c07cd +w16 | 0x7a1d5006_e9bb17bc_6f25e2a2_19c78df4_af19922a_bad640fb_4f65d4d9_e6f4590b +w17 | 0x7a1d5006_e9bb17bc_6f25e2a2_19c78df4_af19922a_bad640fb_4f65d4d9_e6f4590b +w18 | 0x1f5361bc_f6b19ac6_64ef5706_527dbe06_38d3c08e_ed224e04_5ddb151e_ae60e9ba +w19 | 0x540190f6_f2222292_38184d50_ef25c6ac_34f908f6_7a494e88_2ebee549_042de7ca +w20 | 0xc17c6279_f6b19ac6_81332876_527dbe06_7a024204_ed224e04_6baa9455_ae60e9ba +w21 | 0xf2222292_48268673_ef25c6ac_e87a1613_7a494e88_82e2e662_042de7ca_d82c07cd +w22 | 0xc17c6279_1f5361bc_81332876_64ef5706_7a024204_38d3c08e_6baa9455_5ddb151e +w23 | 0x540190f6_48268673_38184d50_e87a1613_34f908f6_82e2e662_2ebee549_d82c07cd w24 | 0xcccccccc_bbbbbbbb_aaaaaaaa_facefeed_deadbeef_cafed00d_d0beb533_1234abcd w25 | 0xcccccccc_bbbbbbbb_aaaaaaaa_facefeed_deadbeef_cafed00d_d0beb533_1234abcd w26 | 0x78fccc06_2228e9d6_89c9b54f_887cf1ee_efbafabd_f9bfd9ee_baeebbbb_dbff9bfa diff --git a/hw/ip/acc/dv/tracer/rtl/acc_trace_if.sv b/hw/ip/acc/dv/tracer/rtl/acc_trace_if.sv index 45a161397ef..4db00ad7b60 100644 --- a/hw/ip/acc/dv/tracer/rtl/acc_trace_if.sv +++ b/hw/ip/acc/dv/tracer/rtl/acc_trace_if.sv @@ -55,11 +55,11 @@ interface acc_trace_if input logic rf_bignum_rd_en_a, input logic rf_bignum_rd_en_b, - input logic [1:0] rf_bignum_wr_en, - input logic rf_bignum_wr_commit, + input logic [1:0] rf_bignum_wr_en, + input logic rf_bignum_wr_commit, input logic [acc_pkg::WLEN-1:0] rf_bignum_wr_data_no_intg, input logic [acc_pkg::ExtWLEN-1:0] rf_bignum_wr_data_intg, - input logic rf_bignum_wr_data_intg_sel, + input logic rf_bignum_wr_data_intg_sel, input logic [acc_pkg::ExtWLEN-1:0] rf_bignum_rd_data_a_intg, input logic [acc_pkg::ExtWLEN-1:0] rf_bignum_rd_data_b_intg, @@ -69,23 +69,23 @@ interface acc_trace_if input logic insn_fetch_resp_valid, input logic insn_fetch_err, - input logic dmem_req_o, - input logic dmem_write_o, - input logic [DmemAddrWidth-1:0] dmem_addr_o, + input logic dmem_req_o, + input logic dmem_write_o, + input logic [DmemAddrWidth-1:0] dmem_addr_o, input logic [acc_pkg::ExtWLEN-1:0] dmem_wdata_o, input logic [acc_pkg::ExtWLEN-1:0] dmem_wmask_o, input logic [acc_pkg::ExtWLEN-1:0] dmem_rdata_i, input acc_pkg::ispr_e ispr_addr, - input logic ispr_init, + input logic ispr_init, input acc_pkg::insn_dec_shared_t insn_dec_shared, input acc_pkg::insn_dec_bignum_t insn_dec_bignum, input acc_pkg::alu_bignum_operation_t alu_bignum_operation, - input logic mac_bignum_en, + input logic mac_bignum_en, input logic [acc_pkg::WLEN-1:0] rnd_data, - input logic rnd_req, - input logic rnd_valid, + input logic rnd_req, + input logic rnd_valid, input logic [acc_pkg::WLEN-1:0] urnd_data, @@ -300,7 +300,7 @@ interface acc_trace_if // KMAC MSG assign ispr_read[IsprKmacMsg] = (any_ispr_read & (ispr_addr == IsprKmacMsg)); - assign ispr_write[IsprKmacMsg] = u_acc_alu_bignum.gen_pqc_wsr.kmac_msg_wr_en & ~ispr_init; + assign ispr_write[IsprKmacMsg] = |(u_acc_alu_bignum.gen_pqc_wsr.kmac_msg_wr_en) && ~ispr_init; // KMAC CFG assign ispr_read[IsprKmacCfg] = (any_ispr_read & (ispr_addr == IsprKmacCfg)); diff --git a/hw/ip/acc/dv/uvm/acc_base_sim_cfg.hjson b/hw/ip/acc/dv/uvm/acc_base_sim_cfg.hjson index 3659af01f89..be560b44c39 100644 --- a/hw/ip/acc/dv/uvm/acc_base_sim_cfg.hjson +++ b/hw/ip/acc/dv/uvm/acc_base_sim_cfg.hjson @@ -78,6 +78,11 @@ name: name: default pre_build_cmds: [] } + { + name: enable_acc_pqc_model + build_opts: ["-CFLAGS -DPQC_EN=true"] + pre_build_cmds: [] + } ] // The value to pass to the --size parameter for gen-binaries.py. This diff --git a/hw/ip/acc/dv/uvm/acc_pqc_sim_cfg.hjson b/hw/ip/acc/dv/uvm/acc_pqc_sim_cfg.hjson index bfab6b74d7f..04dc693e18e 100644 --- a/hw/ip/acc/dv/uvm/acc_pqc_sim_cfg.hjson +++ b/hw/ip/acc/dv/uvm/acc_pqc_sim_cfg.hjson @@ -9,19 +9,18 @@ // Import additional common sim cfg files. import_cfgs: ["{proj_root}/hw/ip/acc/dv/uvm/acc_base_sim_cfg.hjson"] + // PQC specific smoke test smoke_dir: "{acc_dir}/dv/smoke_pqc" // Fusesoc core file used for building the file list. fusesoc_core: lowrisc:dv:acc_sim_pqc:0.1 + // Enable this build mode to configure C++ ISS model + en_build_modes: ["enable_acc_pqc_model"] + // Used to generate pqc instructions with assembly gen pqc_enable: 1 - // Sets accsim to PQC mode - exports: [ - { PQC_EN: 1 }, - ] - // exclusion files vcs_cov_excl_files: ["{proj_root}/hw/ip/acc/dv/uvm/cov/acc_pqc_cov_excl.el"] } diff --git a/hw/ip/acc/dv/uvm/acc_sim_cfg.hjson b/hw/ip/acc/dv/uvm/acc_sim_cfg.hjson index 5bc1956844a..29a954ed317 100644 --- a/hw/ip/acc/dv/uvm/acc_sim_cfg.hjson +++ b/hw/ip/acc/dv/uvm/acc_sim_cfg.hjson @@ -9,6 +9,7 @@ // Import additional common sim cfg files. import_cfgs: ["{proj_root}/hw/ip/acc/dv/uvm/acc_base_sim_cfg.hjson"] + // Generic ACC smoke test smoke_dir: "{acc_dir}/dv/smoke" // Fusesoc core file used for building the file list. @@ -17,11 +18,6 @@ // Used to disable generation of pqc instructions with assembly gen pqc_enable: 0 - // Sets accsim to standard mode - exports: [ - { PQC_EN: 0 }, - ] - // exclusion files vcs_cov_excl_files: ["{proj_root}/hw/ip/acc/dv/uvm/cov/acc_standard_cov_excl.el"] } diff --git a/hw/ip/acc/dv/verilator/acc_top_sim.core b/hw/ip/acc/dv/verilator/acc_top_sim.core index 63723902c8e..6e90e513f2d 100644 --- a/hw/ip/acc/dv/verilator/acc_top_sim.core +++ b/hw/ip/acc/dv/verilator/acc_top_sim.core @@ -10,9 +10,11 @@ filesets: files_acc: depend: - lowrisc:ip:acc - - lowrisc:dv:acc_pqc_off_env_pkg + - 'pqc ? (lowrisc:dv:acc_pqc_on_env_pkg)' + - '!pqc ? (lowrisc:dv:acc_pqc_off_env_pkg)' - lowrisc:dv:acc_model - lowrisc:ip:acc_tracer + - lowrisc:ip:kmac - lowrisc:ip:keymgr_pkg files_verilator: depend: @@ -67,6 +69,7 @@ targets: - '--trace-params' - '--trace-max-array 1024' - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=acc_top_sim"' + - 'pqc ? (-CFLAGS "-DPQC_EN=true")' - '-LDFLAGS "-pthread -lutil -lelf"' - "-Wall" # RAM primitives wider than 64bit (required for ECC) fail to build in diff --git a/hw/ip/acc/dv/verilator/acc_top_sim.sv b/hw/ip/acc/dv/verilator/acc_top_sim.sv index bb493ec53fb..014e154238e 100644 --- a/hw/ip/acc/dv/verilator/acc_top_sim.sv +++ b/hw/ip/acc/dv/verilator/acc_top_sim.sv @@ -3,13 +3,16 @@ // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 -module acc_top_sim ( +module acc_top_sim #( + parameter int NumAppIntf = 4 +) ( input IO_CLK, input IO_RST_N ); import acc_pkg::*; import acc_pqc_env_pkg::*; import edn_pkg::*; + import kmac_pkg::*; import keymgr_pkg::acc_key_req_t; // Size of the instruction memory, in bytes @@ -56,6 +59,26 @@ module acc_top_sim ( logic edn_rnd_data_valid; logic edn_urnd_data_valid; + // KMAC interface + kmac_pkg::app_req_t acc_kmac_app_req; + kmac_pkg::app_rsp_t acc_kmac_app_rsp; + kmac_pkg::app_req_t [NumAppIntf-1:0] kmac_app_req_ifaces; + kmac_pkg::app_rsp_t [NumAppIntf-1:0] kmac_app_rsp_ifaces; + keymgr_pkg::hw_key_req_t kmac_sideload_key; + edn_pkg::edn_req_t kmac_edn_req; + edn_pkg::edn_rsp_t kmac_edn_rsp; + prim_alert_pkg::alert_rx_t [kmac_reg_pkg::NumAlerts-1:0] kmac_alert_rx; + prim_alert_pkg::alert_tx_t [kmac_reg_pkg::NumAlerts-1:0] kmac_alert_tx; + logic [kmac_reg_pkg::NumAlerts-1:0] kmac_alerts; + tlul_pkg::tl_h2d_t kmac_tl_i_d, kmac_tl_i_q; + tlul_pkg::tl_d2h_t kmac_tl_o; + lc_ctrl_pkg::lc_tx_t kmac_lc_escalate_en; + logic kmac_err_tl; + logic acc_kmac_iface_err; + logic kmac_intr_kmac_done, kmac_intr_fifo_empty, kmac_intr_kmac_err; + prim_mubi_pkg::mubi4_t kmac_idle; + logic kmac_en_masking; + // Instruction counter (feeds into acc.INSN_CNT in full block) logic [31:0] insn_cnt; logic [1:0][SideloadKeyWidth-1:0] sideload_key_shares; @@ -73,7 +96,7 @@ module acc_top_sim ( .DmemSizeByte ( DmemSizeByte ), .SecMuteUrnd ( 1'b0 ), .SecSkipUrndReseedAtStart ( 1'b0 ), - .AccPQCEn ( AccPQCEn ) + .AccPQCEn ( AccPQCEn ) ) u_acc_core ( .clk_i ( IO_CLK ), .rst_ni ( IO_RST_N ), @@ -128,10 +151,95 @@ module acc_top_sim ( .sideload_key_shares_i ( sideload_key_shares ), .sideload_key_shares_valid_i ( 2'b11 ), - .kmac_app_req_o ( ), - .kmac_app_rsp_i ( ) + .kmac_app_req_o ( acc_kmac_app_req ), + .kmac_app_rsp_i ( acc_kmac_app_rsp ) + ); + + kmac #( + .EnMasking(1), + .SwKeyMasked(1) + ) u_kmac ( + .clk_i ( IO_CLK ), + .rst_ni ( IO_RST_N ), + .rst_shadowed_ni ( IO_RST_N ), + + // TLUL interface + .tl_i ( kmac_tl_i_q ), + .tl_o ( kmac_tl_o ), + + // Alerts + .alert_rx_i ( kmac_alert_rx ), + .alert_tx_o ( kmac_alert_tx ), + + // life cycle escalation input + .lc_escalate_en_i ( kmac_lc_escalate_en ), + + // KeyMgr sideload key interface + .keymgr_key_i ( kmac_sideload_key ), + + // KeyMgr KDF datapath + .app_i ( kmac_app_req_ifaces ), + .app_o ( kmac_app_rsp_ifaces ), + + // Interrupts + .intr_kmac_done_o ( kmac_intr_kmac_done ), + .intr_fifo_empty_o ( kmac_intr_fifo_empty ), + .intr_kmac_err_o ( kmac_intr_kmac_err ), + + // Idle interface + .idle_o ( kmac_idle ), + + .en_masking_o ( kmac_en_masking ), + + // EDN interface + .clk_edn_i ( IO_CLK ), + .rst_edn_ni ( IO_RST_N ), + .entropy_o ( kmac_edn_req ), + .entropy_i ( kmac_edn_rsp ) ); + + assign kmac_app_req_ifaces[0] = kmac_pkg::APP_REQ_DEFAULT; + assign kmac_app_req_ifaces[1] = kmac_pkg::APP_REQ_DEFAULT; + assign kmac_app_req_ifaces[2] = kmac_pkg::APP_REQ_DEFAULT; + assign kmac_app_req_ifaces[3] = acc_kmac_app_req; + + assign acc_kmac_iface_err = kmac_err_tl | (kmac_app_rsp_ifaces[0] != kmac_pkg::APP_RSP_DEFAULT) + | (kmac_app_rsp_ifaces[1] != kmac_pkg::APP_RSP_DEFAULT) + | (kmac_app_rsp_ifaces[2] != kmac_pkg::APP_RSP_DEFAULT) + | |(kmac_alerts); + assign acc_kmac_app_rsp = kmac_app_rsp_ifaces[3]; + + assign kmac_sideload_key.key = {2{{256{1'b0}}}}; + assign kmac_sideload_key.valid = 1'b1; + + for (genvar i=0; i < kmac_reg_pkg::NumAlerts; i++) begin : g_kmac_alerts + assign kmac_alert_rx[i] = prim_alert_pkg::ALERT_RX_DEFAULT; + assign kmac_alerts[i] = kmac_alert_tx[i].alert_p | ~kmac_alert_tx[i].alert_n; + end + + assign kmac_tl_i_d = tlul_pkg::TL_H2D_DEFAULT; + + tlul_cmd_intg_gen u_tlul_cmd_intg_gen ( + .tl_i(kmac_tl_i_d), + .tl_o(kmac_tl_i_q) + ); + + tlul_rsp_intg_chk u_tlul_rsp_intg_chk ( + .tl_i (kmac_tl_o), + .err_o(kmac_err_tl) + ); + + assign kmac_lc_escalate_en = lc_ctrl_pkg::LC_TX_DEFAULT; + + always_ff @ (posedge IO_CLK) begin + kmac_edn_rsp <= edn_pkg::EDN_RSP_DEFAULT; + if (kmac_edn_req.edn_req == 1'b1) begin + kmac_edn_rsp.edn_ack <= kmac_edn_req.edn_req; + kmac_edn_rsp.edn_bus <= $urandom(); + end + end + // The values returned by the mock EDN must match those set in `standalonesim.py`. localparam logic [1:0][WLEN-1:0] FixedEdnVals = {{4{64'hCCCC_CCCC_BBBB_BBBB}}, {4{64'hAAAA_AAAA_9999_9999}}}; @@ -246,7 +354,7 @@ module acc_top_sim ( end end - localparam int DmemSizeWords = DmemSizeByte / (WLEN / 8); + localparam int DmemSizeWords = DmemSizeByte / (WLEN / 8); localparam int DmemIndexWidth = prim_util_pkg::vbits(DmemSizeWords); logic [DmemIndexWidth-1:0] dmem_index; @@ -294,7 +402,7 @@ module acc_top_sim ( // No integrity errors in Verilator testbench assign dmem_rerror = 1'b0; - localparam int ImemSizeWords = ImemSizeByte / 4; + localparam int ImemSizeWords = ImemSizeByte / 4; localparam int ImemIndexWidth = prim_util_pkg::vbits(ImemSizeWords); logic [ImemIndexWidth-1:0] imem_index; diff --git a/hw/ip/acc/dv/verilator/acc_top_sim_waivers.vlt b/hw/ip/acc/dv/verilator/acc_top_sim_waivers.vlt index 8527776d56c..e25bf7f7a48 100644 --- a/hw/ip/acc/dv/verilator/acc_top_sim_waivers.vlt +++ b/hw/ip/acc/dv/verilator/acc_top_sim_waivers.vlt @@ -6,6 +6,38 @@ lint_off -rule WIDTH -file "*/acc_top_sim.sv" -match "*'ImemStartAddr' generates 32 bits*" lint_off -rule WIDTH -file "*/acc_top_sim.sv" -match "*'stack_wr_ptr_q' generates 4 bits*" +lint_off -rule WIDTH -file "*/prim_count.sv" -match "*'PossibleActions'*" +lint_off -rule WIDTH -file "*/prim_diff_decode.sv" -match "*'skew_cnt_q'*" + +// VARHIDDEN: Local FSM enum values legitimately shadow package-level names +lint_off -rule VARHIDDEN -file "*/kmac_core.sv" -match "*StTerminalError*" +lint_off -rule VARHIDDEN -file "*/kmac_errchk.sv" -match "*StIdle*" +lint_off -rule VARHIDDEN -file "*/kmac_errchk.sv" -match "*StTerminalError*" +lint_off -rule VARHIDDEN -file "*/kmac_entropy.sv" -match "*StTerminalError*" + +// UNOPTFLAT: Combinational loops in KMAC due to struct assignments +lint_off -rule UNOPTFLAT -file "*/prim_arbiter_fixed.sv" +lint_off -rule UNOPTFLAT -file "*/kmac_app.sv" +lint_off -rule UNOPTFLAT -file "*/kmac_errchk.sv" +lint_off -rule UNOPTFLAT -file "*/kmac.sv" + +// UNDRIVEN: Read-only WSRs in ACC are not tracked in ispr_write/ispr_read because +// they are tracked by WDR writes +lint_off -rule UNDRIVEN -file "*/acc_trace_if.sv" -match "*'ispr_read'*" +lint_off -rule UNDRIVEN -file "*/acc_trace_if.sv" -match "*'ispr_write'*" + +// UNUSED: Signals driven for visibility but not consumed in testbench +lint_off -rule UNUSED -file "*/acc_top_sim.sv" -match "*'acc_kmac_iface_err'*" +lint_off -rule UNUSED -file "*/acc_top_sim.sv" -match "*'kmac_intr_kmac_done'*" +lint_off -rule UNUSED -file "*/acc_top_sim.sv" -match "*'kmac_intr_fifo_empty'*" +lint_off -rule UNUSED -file "*/acc_top_sim.sv" -match "*'kmac_intr_kmac_err'*" +lint_off -rule UNUSED -file "*/acc_top_sim.sv" -match "*'kmac_idle'*" +lint_off -rule UNUSED -file "*/acc_top_sim.sv" -match "*'kmac_en_masking'*" +lint_off -rule UNUSED -file "*/kmac_entropy.sv" -match "*'perm_test'*" +lint_off -rule UNUSED -file "*/sha3pad.sv" -match "*'start_valid'*" +lint_off -rule UNUSED -file "*/sha3pad.sv" -match "*'process_valid'*" +lint_off -rule UNUSED -file "*/sha3pad.sv" -match "*'absorb_valid'*" +lint_off -rule UNUSED -file "*/sha3pad.sv" -match "*'done_valid'*" // Mark some signals in the loop controller as public. These are used // by the AccTopApplyLoopWarp() function in acc_top_sim.cc