"Works On My Machine" Is Not Good Enough
On a Windows and Linux machine I own, I compile yosys from source using gcc:
Yosys 0.35+39 (git sha1 031ad38b5, sccache x86_64-w64-mingw32-g++ 13.2.0 -Os)
Going by Makefile, ABC revision is default for this commit: ABCREV = 896e5e7
Final statistics from yosys/abc look something like this:
=== top ===
Number of wires: 1402
Number of wire bits: 7955
Number of public wires: 1402
Number of public wire bits: 7955
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 1719
SB_CARRY 138
SB_DFF 1
SB_DFFE 44
SB_DFFESR 290
SB_DFFSR 84
SB_GB_IO 1
SB_IO 16
SB_LUT4 1131
SB_RAM40_4K 14
Packing stats from nextpnr-ice40 are:
Info: Device utilisation:
Info: ICESTORM_LC: 1276/ 1280 99%
Info: ICESTORM_RAM: 14/ 16 87%
Info: SB_IO: 17/ 112 15%
Info: SB_GB: 7/ 8 87%
Info: ICESTORM_PLL: 0/ 1 0%
Info: SB_WARMBOOT: 0/ 1 0%
CI Demo Breaks
Yosys 0.35+39 (git sha1 031ad38b5, clang 10.0.0-4ubuntu1 -fPIC -Os)
Going by CI build, abc revision is default for this commit: 896e5e7dedf9b9b1459fa019f1fa8aa8101fdf43. This means that yosys and abc are the same revision as on my machine.
Final statistics from CI emulated inside a container look like this:
=== top ===
Number of wires: 1419
Number of wire bits: 8021
Number of public wires: 1419
Number of public wire bits: 8021
Number of memories: 0
Number of memory bits: 0
Number of processes: 0
Number of cells: 1729
SB_CARRY 138
SB_DFF 1
SB_DFFE 44
SB_DFFESR 290
SB_DFFSR 84
SB_GB_IO 1
SB_IO 16
SB_LUT4 1141
SB_RAM40_4K 14
nextpnr-ice40 then fails to pack the design:
Info: Device utilisation:
Info: ICESTORM_LC: 1287/ 1280 100%
Info: ICESTORM_RAM: 14/ 16 87%
Info: SB_IO: 17/ 112 15%
Info: SB_GB: 7/ 8 87%
Info: ICESTORM_PLL: 0/ 1 0%
Info: SB_WARMBOOT: 0/ 1 0%
Info: Placed 18 cells based on constraints.
Info: Creating initial analytic placement for 1161 cells, random placement wirelen = 17758.
Info: at initial placer iter 0, wirelen = 433
Info: at initial placer iter 1, wirelen = 394
Info: at initial placer iter 2, wirelen = 394
Info: at initial placer iter 3, wirelen = 397
Info: Running main analytical placer, max placement attempts per cell = 219453.
ERROR: Failed to expand region (0, 0) |_> (13, 17) of 1287 ICESTORM_LCs
0 warnings, 1 error
Clearly, it is possible to make my demo as-is fit into 1280 LUTs and on an iCEStick- and working at that. However, it is not consistent, depending on the toolchain used to compile yosys and abc. It looks like I'm stress-testing the tools ability to optimize, and running too close to the ragged edge of disaster.
Hints
Log from my Linux machine: top-linux.txt
Log from container with OSS Cad Suite: top-container.txt
The logs (aside from paths and the compiler string) are pretty much identical until the abc9 step, which creates 10 more LUTs with the OSS Cad Suite yosys/abc than the outside-of-container yosys/abc I compiled on my machine yesterday.
TODO
- Figure out why
clang and gcc abc are diverging, if possible.
- Look for low-hanging fruit left in my Sentinel design to further reduce LUT usage to make the design consistently fit. I need a bit more breathing room it seems.
For now, allow continue-on-error in CI, as long as other tests pass.
"Works On My Machine" Is Not Good Enough
On a Windows and Linux machine I own, I compile yosys from source using
gcc:Going by Makefile, ABC revision is default for this commit:
ABCREV = 896e5e7Final statistics from
yosys/abclook something like this:Packing stats from
nextpnr-ice40are:CI Demo Breaks
Going by CI build,
abcrevision is default for this commit:896e5e7dedf9b9b1459fa019f1fa8aa8101fdf43. This means thatyosysandabcare the same revision as on my machine.Final statistics from CI emulated inside a container look like this:
nextpnr-ice40then fails to pack the design:Clearly, it is possible to make my demo as-is fit into 1280 LUTs and on an iCEStick- and working at that. However, it is not consistent, depending on the toolchain used to compile
yosysandabc. It looks like I'm stress-testing the tools ability to optimize, and running too close to the ragged edge of disaster.Hints
Log from my Linux machine: top-linux.txt
Log from container with OSS Cad Suite: top-container.txt
The logs (aside from paths and the compiler string) are pretty much identical until the
abc9step, which creates 10 more LUTs with the OSS Cad Suiteyosys/abcthan the outside-of-containeryosys/abcI compiled on my machine yesterday.TODO
clangandgccabcare diverging, if possible.For now, allow
continue-on-errorin CI, as long as other tests pass.